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7476 Dual Master-Slave J-K Flip-Flop

(1 customer review)

61.50 + GST

  • Supply Voltage : 7V
  • Input Voltage : 5.5V
  • Operating Free Air Temperature Range : 0?C to +70?C
  • Storage Temperature Range : ?65?C to +150?C

25 in stock

This item: 7476 Dual Master-Slave J-K Flip-Flop

25 in stock

61.50 + GST
61.50 + GST
48.38 + GST
1,248.26 + GST
13.05 + GST
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7476 IC contains two independent positive pulse triggered J-K flip-flops with complementary outputs.

The J and K data is processed by the flip-flop after a complete clock pulse. While the clock is LOW the slave is isolated from the master. On the positive transition of the clock, the data from the J and K inputs is transferred to the master. While the clock is HIGH the J and K inputs are disabled. On the negative transition of the clock, the data from the master is transferred to the slave. The logic state of J and K inputs must not be allowed to change while the clock is HIGH. The data is transferred to the outputs on the falling edge of the clock pulse. A LOW logic level on the preset or clear inputs will set or reset the outputs regardless of the logic levels of the other inputs.

1 review for 7476 Dual Master-Slave J-K Flip-Flop

  1. Ayush (verified owner)

    Good quality.

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